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KEENHEADS

5G Baseband Application Processor System on Chip

Key Metrics

  •  Technology 16ffc TSMC
  • Die Size 65 sqmm
  • Gate Count 100 Million
  • Frequency 450Mhz
  • Hier Blocks 13
  • Package Flip Chip BGA
  • Duration 9 months
  • Team Size 25

Project Overview

Keenheads partnered with a leading telecommunications company to develop a cutting-edge 5G Baseband Application Processor System on Chip (SoC). This project aimed to deliver a high-performance, reliable, and scalable solution to meet the growing demands of 5G technology.

Key Project Components

  1. SoC Synthesis, Constraints Generation, and LEC
    • Keenheads performed SoC synthesis, ensuring the logical design met the necessary specifications.
    • Constraints generation was meticulously carried out to guarantee optimal performance.
    • Logic Equivalence Checking (LEC) was conducted to validate the correctness of the synthesized design.
  2. SoC Partitioning and Floorplan
    • The SoC was partitioned effectively to streamline the design process.
    • An efficient floorplan was developed to optimize space and performance, ensuring seamless integration of various components.
  3. SoC Place and Route (PnR) and Physical Verification
    • The place and route process was executed to position the components accurately and establish the routing paths.
    • Comprehensive physical verification ensured the design adhered to all design rules and constraints.
  4. SoC Static Timing Analysis
    • Static Timing Analysis (STA) was performed to analyze and optimize the timing of the SoC, ensuring it met the stringent timing requirements of 5G applications.
  5. IO Ring Design and ESD Reliability Verification
    • A robust IO ring design was implemented to manage the inputs and outputs efficiently.
    • Electrostatic Discharge (ESD) reliability verification was conducted using the client’s proprietary tool to ensure the design’s durability and robustness against ESD events.
  6. DFT STA Constraints Development and Timing Closure
    • Design for Test (DFT) STA constraints were developed to facilitate testing and validation.
    • Timing closure was achieved by fine-tuning the design to meet all timing constraints, ensuring reliable performance under all conditions.
  7. Project Schedule Planning and Management
    • Keenheads meticulously planned and managed the project schedule, coordinating all blocks and the top-level design to ensure timely delivery.
    • Effective management strategies were employed to address potential risks and challenges, ensuring the project stayed on track.

 

Conclusion

Through a combination of advanced techniques, meticulous planning, and a collaborative approach, Keenheads successfully delivered a high-performance 5G Baseband Application Processor SoC. This project not only met the client’s expectations but also set a new benchmark for excellence in the telecommunications industry.